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Stopped · Your code isn't running yet. Until you press Run, the board runs the program already on it.
Nothing printed yet. Press Run.
Not checked yet
Run your code to check it. The checks replay a fixed script on a virtual clock, so the same code always gets the same result.
Each fault really happens in the simulation. Trigger one, watch the figure, then read why.
Play the world: press, slide and turn the parts while the code runs.
Show the ten switches as a three-digit hex number. Each of the six displays has its own eight pins, so one small module, used three times, drives them all at once.
iynk runs your Verilog as a behavioural model, cycle by cycle on the board clock. It does not synthesise, place or route: no timing, no LUT counts.
| Pin | Connects to | What it does |
|---|---|---|
HEX0 | 8 FPGA pins → the right digit's segments | Bit 0 is segment a; 0 lights it |
HEX2 | 8 FPGA pins → the third digit from the right | Shows SW9-SW8 |
SW0 | PIN_C10 (SW[0]) | Bit 0 of the right digit |
Sensors and actuators this board drives, with the real connections.